Dr Bharat Bhushan Upadhyay is an Electronics and VLSI researcher with an M Tech degree in Electronics and Communication Engineering from IIIT Allahabad (Prayagraj), where he was a Bronze Medalist, and a PhD in Electronics Engineering from IIT (BHU), Varanasi, completed in 2025. His research interests include VLSI architectures for signal and image processing, FPGA-based hardware accelerators, approximate computing circuits, and High-Level Synthesis. He has received the IEEE Circuits and Systems Society (CAS) Student Travel Grant and has authored research papers in reputed IEEE Transactions journals, including IEEE TVLSI and IEEE TCAS-II. He is an IEEE member and has also qualified the NET and GATE examinations.